Gehälter für die Stelle „Design Verification Engineer“ in Sachsen

You support product development teams, including but not limited to design input/output, design verification and validation, design changes, risk management,…

Asic design and mixed signal verification knowledge preferably in memory design. Run regression tests reporting results to design engineer.

Create verification plans and develop verification environments based on Unified Verification Methodology (UVM). Self-driven and hands-on way of working.

Think holistically: You contribute during the concept-, design- and qualification phase of the product and are responsible for the documentation of our…

Solid understanding of mixed signal design and verification concepts. Typically 3–8+ years of experience in post-silicon validation, design verification, or…

Developing test methods for design verification and simulated‑use validation, defining manufacturing processes, and documenting all work in our paperless PLM…

vor 11 Tagen