Gehälter für die Stelle „Verification Engineer“ in Deutschland

Experience with formal and dynamic verification. Experience in block level and sub-system or top level verification. Proficiency in SystemVerilog and UVM.

Knowledge of semiconductor, ASIC, FPGA, or hardware verification workflows. Set up a Continuous Integration flow.

Build verification infrastructure for the block. Proficiency in developing verification environments from scratch.

vor 2 Tagen

2,100 colleagues from 46 countries, including 800 engineers, shape in Hennigsdorf the future of rail mobility. Writing the train level test specifications.

Experience with Linux (and its drivers) and PCIe devices. Solid knowledge and experience in dynamic thermal management (DTM). Knowledge of the JIRA tool.