Gehälter für die Stelle „Design Verification Engineer“ in Sachsen

Experience with formal and dynamic verification. Experience in block level and sub-system or top level verification. Proficiency in SystemVerilog and UVM.

Knowledge of semiconductor, ASIC, FPGA, or hardware verification workflows. Set up a Continuous Integration flow.

Excellent problem-solving and analytical skills, with the ability to troubleshoot and resolve complex physical design issues. Knowledge of the JIRA tool.

Build verification infrastructure for the block. Proficiency in developing verification environments from scratch.

vor 2 Tagen

You will work closely with hardware engineers, system architects, product owners, verification engineers, and GNSS experts to build reliable and secure embedded…

vor 3 Stunden