Gehälter für die Stelle „Design Verification Engineer“ in Nordrhein-Westfalen

Knowledge of semiconductor, ASIC, FPGA, or hardware verification workflows. Set up a Continuous Integration flow.

Experience with formal and dynamic verification. Experience in block level and sub-system or top level verification. Proficiency in SystemVerilog and UVM.

Excellent problem-solving and analytical skills, with the ability to troubleshoot and resolve complex physical design issues. Knowledge of the JIRA tool.

Build verification infrastructure for the block. Proficiency in developing verification environments from scratch.

vor 1 Tag

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Formal verification or model checking for behaviour tree skill trees. Skill primitive API surface design: port schemas, error types, pre/postcondition contracts…