Secure Transactions & Interface (STI) works at the forefront of technology providing solutions for mobile wallet (payment, transit, access), mobile security, identification, and UWB in consumer products ranging from smartphones to laptops.
We are seeking a Principal FPGA Engineer to join our team in Hamburg or Gratkorn , contributing to the development of cutting-edge mobile payment and security solutions for smartphones, smartwatches and laptops.
In this role, you will be responsible for defining and advancing STI’s FPGA strategy, methodologies and design flows. You will develop and maintain FPGA-based prototyping platforms that accelerate product development and facilitate collaboration across architecture, design, verification, validation, firmware, and software development teams. Working closely with cross-functional stakeholders, you will play a key role in accelerating product development, enabling system validation, and ensuring the successful delivery of innovative and secure technology solutions.
This high visible role offers the unique opportunity to influence product development throughout the entire lifecycle, from system architecture and FPGA prototyping to silicon validation and bring-up. Success in this position requires strong collaboration and effective communication with globally distributed teams across USA, Germany, France and India.
If you are looking for a job in a fast-paced collaborative environment where you will see the products you work on in people’s hands every day, we have a place for you!
Job Summary:
Define and drive FPGA strategy, methodologies, and development flows by leveraging industry-leading FPGA technologies, tools and best practices to address diverse project requirements.
Contribute to the continuous improvement and evolution of FPGA tools, technologies, methodologies and design flows to enhance development efficiency and quality.
Design, develop, and deploy FPGA-based prototyping and verification platforms, delivering scalable solutions that support internal stakeholders, including Verification, Validation, Firmware and Software teams.
Perform FPGA design debugging and system bring-up using laboratory equipment and debugging tools such as oscilloscopes, logic analyzers, and JTAG interfaces.
Collaborate closely with cross-functional teams, including design, verification, validation, firmware and software engineering to investigate issues, implement corrective actions and develop effective workarounds when required.
Create and maintain comprehensive technical documentation, including user guides, defect reports, release notes and project status updates.
Job Qualifications:
Proven track record of 7+ years in FPGA and/or ASIC engineering with experience delivering complex semiconductor solutions from design through implementation.
Strong expertise in RTL design and development using SystemVerilog, Verilog and VHDL.
Hands-on experience with industry-standard FPGA development and synthesis tools, including Vivado, Synplify and ChipScope.
Proven experience working with leading FPGA platforms, with a preference for Xilinx/AMD devices; experience with Lattice or Altera FPGA solutions is also highly valued.
Demonstrated ability to develop and implement timing constraints (SDC) and achieve timing closure for high-speed FPGA designs.
Proficiency with simulation and verification tools such as ModelSim, VCS and Xcelium.
Comprehensive understanding of embedded software engineering processes and practical experience in software development and debugging for embedded CPU platforms.
Experience developing automation scripts and build environments using languages and tools such as Bash, Perl, Python, Tcl and CMake.
Solid understanding of industry-standard on-chip communication protocols, including AHB, AXI, I²C, I3C and SPI.
Strong hardware and software debugging skills, with hands-on experience using laboratory equipment such as oscilloscopes, logic analyzers and SWD debugging tools.
Excellent verbal and written communication skills, with the ability to effectively collaborate across multidisciplinary and geographically distributed teams.
Willingness and ability to work on-site a minimum of three days per week.
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