The MCU/MPU Engineering Digital IP team defines and develops components for a wide range of products, including automotive microprocessors, application processors, microcontrollers, and networking solutions.The Munich Digital IP team focuses on the development of interface components, DSP subsystems, next-generation AI/ML cores, and RISC-V-based IP. This position is intended to strengthen the Munich team with experienced verification engineers working across multiple digital IP and subsystem domains.
- Perform pre-silicon verification of AI/ML processing blocks, RISC-V processors, or similar digital IPs.
- Define and develop comprehensive IP verification plans based on requirements such as industry standards, product requirements, architecture, and design specifications.
- Collaborate closely with hardware, firmware, and software teams, as well as architecture and system engineering teams, to understand IP functionality and system-level use cases.
- Execute verification plans in alignment with product specifications to ensure high-quality, zero-defect IP delivery.
- Architect, develop, debug, and maintain UVM-based verification environments for RTL simulation.
- Develop testcases within appropriate verification frameworks, including stimulus generation and assertion-based verification.
- Run simulations across multiple abstraction levels (RTL, power-aware RTL, gate-level, FPGA, and emulation platforms).
- Execute regressions, analyze results, and drive closure of functional and code coverage.
- Identify issues, debug failures, and contribute to continuous improvement of verification methodologies and flows.
Please note: The successful candidate may/will be responsible for security related tasks. The assignment may/will be in scope of security certifications, therefore a conscious and reliable way of working is necessary .
