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SRAM Compiler Circuit Designer

Apple -
München

Jetzt bewerben

Details zur Stelle

Qualifikationen

Doktorat
Elektrotechnik
Master
Bachelor
Elektrotechnik
Führungserfahrung

Vollständige Stellenbeschreibung

Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Multifaceted, amazing people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver the next groundbreaking Apple product! Do you love working on challenges that no one has solved yet? At Apple, we are pushing the boundary of what is possible to improve the lives of our customers.

As a Senior Circuit Designer within our Digital Design Engineering group, you will transform innovative and revolutionary ideas into reality. You will apply engineering fundamentals and begin from scratch when necessary, bringing visionary concepts to life. As part of our exciting silicon design team, you'll be responsible for developing innovative ASICs that enhance customer experiences. We have an extraordinary opportunity for Compiler Circuit Design Engineers. This prominent role plays a critical part in our processor design efforts, ensuring our products reach the market swiftly.

Description
In this role, you will find yourself at the core of our hardware development endeavors. As part of the memory compiler team, you will work closely with foundry, compiler vendors, and design teams, integrating new ideas and collaborating with dedicated engineers. Your efforts will directly influence the Performance Power Analysis (PPA) of end products.

You will:

Drive the development of SRAM, register files, and latch arrays to enable high-performance, low-power design.
Possess a comprehensive understanding of globally available IC compilers.
Lead the SRAM compiler IP requirements for foundry, vendors, and internal IP teams.
Understand the complete design flow spectrum, including DFT and testing aspects of compiler IPs, and integrate them into our SOCs
Collaborate with logic/architecture teams to capture specifications of SRAM, register files, and latch arrays, driving their implementation.

Preferred Qualifications
Masters/PhD in Electrical Engineering.
SRAM design experience from schematic to layout to post-silicon analysis.
Track record of successful tape-out of high-performance, low-power circuit design, particularly in SRAM and register file arrays in the latest technology nodes.
Strong leadership skills, including the ability to guide multi-functional teams through failure analysis, corrective action plans, and yield bridges for successful ramp-up and mass production.
Exceptional technical expertise with the ability to present complex technical topics to diverse audiences.
Experience with ML-based programming algorithms.
Ability to provide automation solutions for rapid and dynamic design needs.

Minimum Qualifications
A Bachelor’s in Electrical Engineering (BSEE) is required.
Significant circuit design experience.
Expertise in developing memory arrays, high-performance, low-power circuit design, and register file/SRAM arrays.
Proficiency in industry-standard circuit simulation, design tools, and top-level integration tools.
A solid understanding of device physics and process.
Fluency in English

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