Gehälter für die Stelle „Design Verification Engineer“ in Deutschland

Experience with formal and dynamic verification. Experience in block level and sub-system or top level verification. Proficiency in SystemVerilog and UVM.

Knowledge of semiconductor, ASIC, FPGA, or hardware verification workflows. Set up a Continuous Integration flow.

Excellent problem-solving and analytical skills, with the ability to troubleshoot and resolve complex physical design issues. Knowledge of the JIRA tool.

Cross-Functional Collaboration: Collaborate with various teams, including design engineers, production teams, and quality assurance personnel to ensure that the…

vor 9 Tagen

Collaborate with industry and international partners consisting of interdisciplinary teams of scientists, engineers, and technicians.

Experience with environmental auditing and compliance verification. The environmental engineer will work with internal and external partners that include…