Gehälter für die Stelle „Design Verification Engineer“ in Deutschland

Someone who thinks like an engineer, not only as a tester. Verify that implemented features match the agreed product behavior and technical design.

Ab 48.000 € pro Jahr

vor 9 Tagen

Apply simulation and analysis methods to support design decisions. Support verification, validation, and regulatory activities as required.

Knowledge of semiconductor, ASIC, FPGA, or hardware verification workflows. Set up a Continuous Integration flow.

Experience with formal and dynamic verification. Experience in block level and sub-system or top level verification. Proficiency in SystemVerilog and UVM.

You will work closely with other teams’ highly skilled engineers to guarantee a successful firmware design, which is essential for enabling our future products.

Define the system-level verification and validation strategy, drive milestones and design reviews focused on layout maturity.