Gehälter für die Stelle „Design Verification Engineer“ in Nordrhein-Westfalen

We may use artificial intelligence (AI) tools to support parts of the hiring process, such as reviewing applications, analyzing resumes, or assessing responses…

90.000 € – 160.000 € pro Jahr

Mentorship: Guide junior engineers and contribute to a culture of technical excellence in AI and automation. SonarSweep & Sonar Context Augmentation: Providing…

115.000 € – 160.000 € pro Jahr

Supporting and influencing analog design teams to ensure testability is integrated early in the design phase. Experience in cross-functional collaboration with…

Experience with formal and dynamic verification. Experience in block level and sub-system or top level verification. Proficiency in SystemVerilog and UVM.

Excellent problem-solving and analytical skills, with the ability to troubleshoot and resolve complex physical design issues. Knowledge of the JIRA tool.

Knowledge of semiconductor, ASIC, FPGA, or hardware verification workflows. Set up a Continuous Integration flow.