Gehälter für die Stelle „Verification Engineer“ in Deutschland

Experience with formal and dynamic verification. Experience in block level and sub-system or top level verification. Proficiency in SystemVerilog and UVM.

Knowledge of semiconductor, ASIC, FPGA, or hardware verification workflows. Set up a Continuous Integration flow.

To develop verification methods and test plans for in-house activities. To perform and report on verification, integration, and test tasks.

Unterstützung bei Anlagenqualifizierungen (DQ, IQ, OQ, PQ) und Prozessvalidierungen. Erstellung von Prüfprotokollen und Dokumentationen im regulierten Umfeld (…

Support verification, validation, and regulatory activities as required. Plan and execute functional tests and verification activities to confirm compliance…

Planning and initiation of verification activities as well as evaluation of results for concept and design validation. Development in accordance with SPICE.